#ifndef __KERNEL_MODULES_SH7724_INTC_H__
# define __KERNEL_MODULES_SH7724_INTC_H__

#include <stdint.h>
#include <stddef.h>
#include "bits/union_types.h"
#include "bits/attributes.h"

struct __sh7305_intc_s
{
	//---
	// Interrupt priority register.
	//---
	word_union(IPRA,
		uint16_t TMU0		: 4;	/* Timer 0 */
		uint16_t TMU1		: 4;	/* Timer 1 */
		uint16_t TMU2		: 4;	/* Timer 2 */
		uint16_t const		: 4;
	);
	GAPS(2);
	word_union(IPRB,
		uint16_t ADC		: 4;	/* A/D Converter */
		uint16_t unknown0	: 4;	/* ???? */
		uint16_t unknown1	: 4;	/* ???? */
		uint16_t const		: 4;
	);
	GAPS(2);
	word_union(IPRC,
		uint16_t const		: 4;
		uint16_t const		: 4;
		uint16_t const		: 4;
		uint16_t SPU		: 4;	/* Sound Processing Unit (with DSP0 and DSP1) */
	);
	GAPS(2);
	word_union(IPRD,
		uint16_t const		: 4;
		uint16_t MMCIF		: 4;	/* MultiMedia Card Interface(?) */
		uint16_t const		: 4;
		uint16_t const		: 4;
	);
	GAPS(2);
	word_union(IPRE,
		uint16_t DMACA		: 4;	/* Direct Memory Controller */
		uint16_t const		: 4;
		uint16_t ETMU3		: 4;	/* Extra TMU 3 */
		uint16_t const		: 4;
	);
	GAPS(2);
	word_union(IPRF,
		uint16_t KEYSC		: 4;	/* Key Scan Interface */
		uint16_t DMACB		: 4;	/* Direct Memory transfer / error info(?) */
		uint16_t USB		: 4;	/* USB Controller */
		uint16_t CMT		: 4;	/* Compare Match Timer */
	);
	GAPS(2);
	word_union(IPRG,
		uint16_t SCIF		: 4;	/* SCIF transfert / error info */
		uint16_t ETMU1		: 4;	/* Extra TMU1 */
		uint16_t ETMU2		: 4;	/* Extra TMU3 */
		uint16_t const		: 4;
	);
	GAPS(2);
	word_union(IPRH,
		uint16_t MSIOF0		: 4;	/* Clock-synchronized SCIF channel 0(?) */
		uint16_t MSIOF1		: 4;	/* Clock-synchronized SCIF channel 1(?) */
		uint16_t unknown0	: 4;	/* ???? */
		uint16_t unknown1	: 4;	/* ???? */
	);
	GAPS(2);
	word_union(IPRI,
		uint16_t ETMU4		: 4;	/* Extra TMU 4 */
		uint16_t const		: 4;
		uint16_t unknown0	: 4;	/* ???? */
		uint16_t const		: 4;
	);
	GAPS(2);
	word_union(IPRJ,
		uint16_t ETMU0		: 4;	/* Extra Timer 0 */
		uint16_t unknown0	: 4;	/* ???? */
		uint16_t FSI		: 4;	/* FIFO - buffered Serial Interface (?) */
		uint16_t unknown1	: 4;	/* ???? */
	);
	GAPS(2);
	volatile word_union(IPRK,
		uint16_t RTC		: 4;	/* Real Time Clock */
		uint16_t SDC		: 4;	/* SD Card Controller */
		uint16_t const		: 4;
		uint16_t const		: 4;
	);
	GAPS(2);
	word_union(IPRL,
		uint16_t ETMU5		: 4;	/* Extra TMU5 */
		uint16_t unknown0	: 4;	/* ???? */
		uint16_t const		: 4;
		uint16_t const		: 4;
	);
	GAPS(0x52);


	//---
	// Interrupt mask register.
	// FIXME
	// This is the SH7224 Interrupt mask registers, so find
	// the interrupt mask regiters for the SH7305.
	//---
	byte_union(IMR0,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMR1,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t DEI3		: 1;	/* DMAC channel 3 (?) */
		uint8_t DEI2		: 1;	/* DMAC channel 2 (?) */
		uint8_t DEI1		: 1;	/* DMAC channel 1 (?) */
		uint8_t DEI0		: 1;	/* DMAC channel 0 (?) */
	);
	GAPS(3);
	byte_union(IMR2,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMR3,
		uint8_t unknwon0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
		uint8_t unknown3	: 1;	/* ???? */
		uint8_t SPU2DSP0	: 1;	/* SPU.DSP0 (or 1?) */
		uint8_t SPU2DSP1	: 1;	/* SPU.DSP1 (or 0?) */
		uint8_t const		: 1;
		uint8_t const		: 1;
	);
	GAPS(3);
	byte_union(IMR4,
		uint8_t const		: 1;
		uint8_t TUNI2		: 1;	/* TMU2 (timer2) ? */
		uint8_t TUNI1		: 1;	/* TMU1 (timer1) ? */
		uint8_t TUNI0		: 1;	/* TMU0 (timer0) ? */
		uint8_t ADC		: 1;	/* A/D Converter */
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMR5,
		uint8_t KEYI		: 1;	/* KEYSC */
		uint8_t DADERR		: 1;	/* DMAC Address error (?) */
		uint8_t DEI5		: 1;	/* DMAC Channel 5 */
		uint8_t DEI4		: 1;	/* DMAC Channel 4 */
		uint8_t const		: 1;
		uint8_t ETMU2		: 1;	/* Extra Timer 2 */
		uint8_t ETMU1		: 1;	/* Extra Timer 1 */
		uint8_t ETMU3		: 1;	/* Extra Timer 3 */
	);
	GAPS(3);
	byte_union(IMR6,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t ETMU4		: 1;	/* Extra Timer 4 */
		uint8_t ETMU0		: 1;	/* Extra Timer 0 */
		uint8_t const		: 1;
		uint8_t MSIOFI1		: 1;	/* MSIOF (?) */
		uint8_t MSIOFI0		: 1;	/* MSIOF (?) */
	);
	GAPS(3);
	byte_union(IMR7,
		uint8_t DTE0I		: 1;	/* I2C0 (?) */
		uint8_t WAITT0I		: 1;	/* I2C0 (?) */
		uint8_t TACK0I		: 1;	/* I2C0 (?) */
		uint8_t AL0I		: 1;	/* I2C0 (?) */
		uint8_t DTE1I		: 1;	/* I2C1 (?) */
		uint8_t WAITT1I		: 1;	/* I2C1 (?) */
		uint8_t TACK1I		: 1;	/* I2C1 (?) */
		uint8_t AL1I		: 1;	/* I2C1 (?) */
	);
	GAPS(3);
	byte_union(IMR8,
		uint8_t const 		: 1;
		uint8_t const 		: 1;
		uint8_t const 		: 1;
		uint8_t const 		: 1;
		uint8_t const		: 1;
		uint8_t unknwon0	: 1;	/* ???? */
		uint8_t unknwon1	: 1;	/* ???? */
		uint8_t FSI		: 1;	/* FSI (?) */
	);
	GAPS(3);
	byte_union(IMR9,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t CMT		: 1;	/* CMT */
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t USI		: 1;	/* USB */
		uint8_t const		: 1;
	);
	GAPS(3);
	byte_union(IMR10,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t SDC		: 1;	/* SD Card */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t const		: 1;
		uint8_t ATI		: 1;	/* RTC alarm */
		uint8_t PRI		: 1;	/* RTC periodic interrupt */
		uint8_t CUI		: 1;	/* RTC carry */
	);
	GAPS(3);
	byte_union(IMR11,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMR12,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
	);
	GAPS(15);

	
	//---
	// Interrupt clear mask register.
	// FIXME
	// This is the SH7224 Interrupt mask registers, so find
	// the interrupt mask regiters for the SH7305.
	//---
	byte_union(IMCR0,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMCR1,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t DEI3		: 1;	/* DMAC channel 3 (?) */
		uint8_t DEI2		: 1;	/* DMAC channel 2 (?) */
		uint8_t DEI1		: 1;	/* DMAC channel 1 (?) */
		uint8_t DEI0		: 1;	/* DMAC channel 0 (?) */
	);
	GAPS(3);
	byte_union(IMCR2,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMCR3,
		uint8_t unknwon0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
		uint8_t unknown3	: 1;	/* ???? */
		uint8_t SPU2DSP0	: 1;	/* SPU.DSP0 (or 1?) */
		uint8_t SPU2DSP1	: 1;	/* SPU.DSP1 (or 0?) */
		uint8_t const		: 1;
		uint8_t const		: 1;
	);
	GAPS(3);
	byte_union(IMCR4,
		uint8_t const		: 1;
		uint8_t TUNI2		: 1;	/* TMU2 (timer2) ? */
		uint8_t TUNI1		: 1;	/* TMU1 (timer1) ? */
		uint8_t TUNI0		: 1;	/* TMU0 (timer0) ? */
		uint8_t ADC		: 1;	/* A/D Converter */
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMCR5,
		uint8_t KEYI		: 1;	/* KEYSC */
		uint8_t DADERR		: 1;	/* DMAC Address error (?) */
		uint8_t DEI5		: 1;	/* DMAC Channel 5 */
		uint8_t DEI4		: 1;	/* DMAC Channel 4 */
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ??? */
		uint8_t SCIF		: 1;	/* SCIF */
	);
	GAPS(3);
	byte_union(IMCR6,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t const		: 1;
		uint8_t MSIOFI1		: 1;	/* MSIOF (?) */
		uint8_t MSIOFI0		: 1;	/* MSIOF (?) */
	);
	GAPS(3);
	byte_union(IMCR7,
		uint8_t DTE0I		: 1;	/* I2C0 (?) */
		uint8_t WAITT0I		: 1;	/* I2C0 (?) */
		uint8_t TACK0I		: 1;	/* I2C0 (?) */
		uint8_t AL0I		: 1;	/* I2C0 (?) */
		uint8_t DTE1I		: 1;	/* I2C1 (?) */
		uint8_t WAITT1I		: 1;	/* I2C1 (?) */
		uint8_t TACK1I		: 1;	/* I2C1 (?) */
		uint8_t AL1I		: 1;	/* I2C1 (?) */
	);
	GAPS(3);
	byte_union(IMCR8,
		uint8_t const 		: 1;
		uint8_t const 		: 1;
		uint8_t const 		: 1;
		uint8_t const 		: 1;
		uint8_t const		: 1;
		uint8_t unknwon0	: 1;	/* ???? */
		uint8_t unknwon1	: 1;	/* ???? */
		uint8_t FSI		: 1;	/* FSI (?) */
	);
	GAPS(3);
	byte_union(IMCR9,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t CMT		: 1;	/* CMT */
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t USI		: 1;	/* USB */
		uint8_t const		: 1;
	);
	GAPS(3);
	byte_union(IMCR10,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t const		: 1;
		uint8_t ATI		: 1;	/* RTC alarm */
		uint8_t PRI		: 1;	/* RTC periodic interrupt */
		uint8_t CUI		: 1;	/* RTC carry (?)*/
	);
	GAPS(3);
	byte_union(IMCR11,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
	);
	GAPS(3);
	byte_union(IMCR12,
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t unknown0	: 1;	/* ???? */
		uint8_t unknown1	: 1;	/* ???? */
		uint8_t unknown2	: 1;	/* ???? */
		uint8_t const		: 1;
		uint8_t const		: 1;
		uint8_t const		: 1;
	);
	GAPS(0xbff0e);

	//---
	//	Interrupt Control registers 0
	//---
	word_union(ICR0,
		uint16_t const NMIL	:1;	/* Non Maskable Interrupt Input level */
		uint16_t MAI		:1;	/* Non Maskable Interrupt interrupt Mask */
		uint16_t const		:4;	/* All 0 */
		uint16_t NMIB		:1;	/* Non Maskable Interrupt Block Mode */
		uint16_t NMIE		:1;	/* Non Maskable Interrupt Edge Select */
		uint16_t const _high	:2;	/* All 1 */
		uint16_t const		:6;	/* All 0 */
	);
	GAPS(0x0e);
	

	//---
	//	Interrupt Priority registers
	//---
	long_union(INTPRI00,
		uint32_t IRQ0	: 4;	/* Interrupt Request 0 */
		uint32_t IRQ1	: 4;	/* Interrupt Request 1 */
		uint32_t IRQ2	: 4;	/* Interrupt Request 2 */
		uint32_t IRQ3	: 4;	/* Interrupt Request 3 */
		uint32_t const	: 4;	/* All 0 */
		uint32_t const	: 4;	/* All 0 */
		uint32_t const	: 4;	/* All 0 */
		uint32_t const	: 4;	/* All 0 */
	);
	GAPS(8);

	//---
	//	Interrupt Control register 1
	//---
	word_union(ICR1,
		uint8_t IRQ0S	:2;	/* Interrupt Request 0 Sense Select */
		uint8_t IRQ1S	:2;	/* Interrupt Request 1 Sense Select */
		uint8_t IRQ2S	:2;	/* Interrupt Request 2 Sense Select */
		uint8_t IRQ3S	:2;	/* Interrupt Request 3 Sense Select */
		uint8_t const	:8;	/* All 0 */
	);
	GAPS(6);

	//---
	//	Interrupt request register.
	//---
	byte_union(INTREQ00,
		uint8_t IRQ0	: 1;	/* Interrupt Request 0 */
		uint8_t IRQ1	: 1;	/* Interrupt Request 1 */
		uint8_t IRQ2	: 1;	/* Interrupt Request 2 */
		uint8_t IRQ3	: 1;	/* Interrupt Request 3 */
		uint8_t const	: 4;	/* All 0 */
	);
	GAPS(0x1f);

	//---
	//	Interrupt mask register.
	//---
	byte_union(INTMSK00,
		uint8_t IRQ0	: 1;	/* Interrupt Mask 0 */
		uint8_t IRQ1	: 1;	/* Interrupt Mask 1 */
		uint8_t IRQ2	: 1;	/* Interrupt Mask 2 */
		uint8_t IRQ3	: 1;	/* Interrupt Mask 3 */
		uint8_t const	: 4;	/* All 0 */
	);
	GAPS(0x1f);

	//---
	//	Interrupt mask clear register. (write only).
	//---
	byte_union(INTMSKCLR00,
		uint8_t IRQ0	: 1;	/* Interrupt Request 0 */
		uint8_t IRQ1	: 1;	/* Interrupt Request 1 */
		uint8_t IRQ2	: 1;	/* Interrupt Request 2 */
		uint8_t IRQ3	: 1;	/* Interrupt Request 3 */
		uint8_t const	: 4;	/* All 0 */
	);
	GAPS(0x5b);

	//---
	//	Non Maskable Interrupt flags control register
	//---
	word_union(NMIFCR,
		uint16_t NMIFL		: 1;	/* NMI Interrupt Request Detection */
		uint16_t const		: 15;	/* All 0 */
	);
	GAPS(0x5bff3e);

	//---
	//	User interrupt mask level register.
	//---
	long_union(USERMSK,
		uint32_t SECRET	: 8;	/* Only write 0xa5 */
		uint32_t const	: 8;	/* All 0 */
		uint32_t UIMASK	: 4;	/* User Interrupt Mask Level */
		uint32_t const	: 4;	/* All 0 */
	);
};

#define SH7305_INTC	(*(volatile struct __sh7305_intc_s	*)0xa4080000)
#endif /*__KERNEL_MODULES_SH7724_INTC_H__*/