Hello

I'm looking for any information on the Hitachi HD62119A02, the CPU used in the Casio CFX-9800G.

Does anyone know anything about its architecture, instruction set, or relationship to other Hitachi processors? Datasheets, documentation, or previous research would be nice to have (found none in bibliography)

So far, I've found a few interesting references:
https://martin.poupe.org/casio/
https://github.com/mamedev/mame/blob/master/src/devices/cpu/hcd62121/hcd62121.cpp
https://forums.bannister.org/ubbthreads.php?Board=1&main=3073&type=thread&ubb=printthread
https://www.shared-ptr.com/sh_insns.html

The CFX-9800G service manual also provides a CPU pinout. It identifies a 19-bit address bus, an 8-bit data bus, and several I/O and control signals. The other identified components include a Fujitsu MB834000 4-Mbit ROM and NEC uPD43256 32K × 8 SRAM.

As some of you know I'm planning to reverse engineer the CFX-9800G myself (for Linux), so I need to gather whatever information is already out there before getting started (so I don't spend 300 years implementing it).
(and so it doesnt cost me a lot of money)

Thanks!