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Utilitaires >> Graph 90+E >> Add-ins >> Ptune3
Ptune3
Version : 0.20beta Taille : 67476 octets Ajouté le : 2019-01-03 10:55 Modifié le : 2019-01-03 10:57
Auteur et posteur :
Sentaro21Hors ligneMembrePoints: 244 Défis: 0 Message
Planète Casio - Add-in Casio - Ptune3 - sentaro21 - Calculatrices
Nombre de visites sur cette page : 115
Score au progrank : 14
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Ce programme est sous licence GPL 2.0.


Description :

Cet outil modifie le CPG (Clock Pulse Generator) et le BSC (Bus State Controller).

C'est un programme dérivé de Ptune2, mais il est encore incomplet.

====== Avertissement !!! ==========================
Cet outil est conçu pour fonctionner en toute tranquillité, mais de possibles dysfonctionnements peuvent survenir.
Néanmoins, cet outil peut également causer des pertes de données sur votre calculatrice voire la destruction irrémédiable de son système !
Utilisez-le donc à vos risques et périls. En aucun cas, je ne serai tenu responsable d'éventuels dégâts (et Planète-Casio non plus).
===================================================

Fichier 1 : Ptune2 pour Graph 90+E fx-CG50 SH4
Fichier 2 : Sources


Readme Ptune3
Cliquer pour enrouler
===============================================================================

Ptune3 is SH7305 CPG&BSC&DBSC tuning utility for PRIZM fx-CG50/Graph 90+E v0.20

copyright(c)2014/2015/2016/2017/2018 by sentaro21
e-mail Email address, replace the 【arobase】 with a @ and ▶ with a . : sentaro21【arobase】pm▶matrix▶jp

===============================================================================

It is about the same with Ptune2.
But cannot operate SDRAM timing well.
That still hasn't been solved.

###############################################################################
#As for the current version, only fx-CG50/Graph 90+E supports. #
#This does not work in CG10/20. #
###############################################################################

====== Warning!!! =============================================================
This tool is made to work safely, but unknown malfunction may happen.
This tool can cause damage on your calculator!
Use it at your own risk.
will not be responsible for any damage.
===============================================================================

-------------------------------------------------------------------------------
How to use
-------------------------------------------------------------------------------
Main screen
----------------------------------
FLL:x900 * 14.75MHz
PLL:x16 *235.93MHz
IFC:1/2 CPU *117.96MHz
SFC:1/4 roR 8 * 58.98MHz
BFC:1/4 CL 2 * 58.98MHz
PFC:1/8 * 29.49MHz
messeage area / benchmark score
[function key]
-----------------------------------

roR: Number of ROM Wait Cycles in Read Access. color red: dangerous range.
CL : Number of SDRAM CL
-------------------------------------------------------------------------------

-[UP] select up (FLL,PLL,SFC,BFC,PFC)
-[DOWN] select down (FLL,PLL,SFC,BFC,PFC)

-[LEFT] decrement 1 step multiplication or divider
-[RIGHT] increment 1 step multiplication or divider

-[SHIFT]+[UP] select FLL multiplication ( =>setup select )

-[F1] Load normal default setting CPU 119MHz, PLLx16, bus 59MHz, default
-[F2] Recall [F2] setting preset CPU 59MHz, PLLx16, bus 29MHz, same as CG10/20
-[F3] Recall [F3] setting preset CPU 96MHz, PLLx26, bus 48MHz, same as CG10/20 overclock (Pover)
-[F4] Recall [F4] setting preset CPU 236MHz, PLLx32, bus 58MHz, only overclock CPU
-[F5] Recall [F5] setting preset CPU 192MHz, PLLx26, bus 95MHz, PLL x16 -> x26
-[F6] simple benchmark
CPUcore simple loop count per 100ms. ( 9860G add-in "UTIL" like )
and MEMORY(ROM,RAM,I/O) access loop count per 50ms
toggle more
CPUcore and PutDsipDD speed (fps)

-[SHIFT]
-[F1] Save setting to file (main memory). load data automatically on the next run.
-[F2] Store current setting to function KEY [F2]
-[F3] Store current setting to function KEY [F3]
-[F4] Store current setting to function KEY [F4]
-[F5] Store current setting to function KEY [F5]
-[F6] Load setting from file (main memory)

-[OPTN] List of bus frequency limit value table in each of wait.
-[F4] initialize default setting
-[F5] Only SDRAM Test
-[F6] Auto check for memory speed in each of wait.(ROM only)

-[VARS]
-[F1] register display FRQCR,CCR
-[F2] register display DBSC (SDRAM)

-[F3] modify CS0BCR CS2BCR
select cursor key
-[F1] +
-[F2] -
-[F4] initialize default setting

-[F4] modify CS0WCR CS2WCR
select cursor key
-[F1] +
-[F2] -
-[F4] initialize default setting

-[F5] modify CS3BCR CS4BCR
select cursor key
-[F1] +
-[F2] -
-[F4] initialize default setting

-[F6] modify CS3WCR CS4WCR
select cursor key
-[F1] +
-[F2] -
-[F4] initialize default setting

-[PRGM]
-[F1] modify CS3BCR CS4BCR
-[F2] modify CS3WCR CS4WCR
-[F3] modify CS5ABCR CS5BBCR
-[F4] modify CS5AWCR CS4BWCR
-[F5] modify CS6ABCR CS6BBCR
-[F6] modify CS6AWCR CS6BWCR

-[EXIT] exit

-[AC] default menu screen

-[EXE] if benchmark selected it is carried out once again.

-[*] increment ROM wait
-[/] decrement ROM wait
When it may be lowered, memory check begins
if error,cannot decrement.


-[SETUP] default setting
ROM Wait margin 0-15% 5% ( less than 1% is dangerous. ) not reset wait table.
RAM Wait margin 0-15% 5% ( less than 1% is dangerous. ) not reset wait table.
PLL frequency MAX 800MHz
CPU frequency MAX 275MHz
Shw frequency MAX 150MHz
Bus frequency MAX 100MHz
I/O frequency MAX 50MHz
Startup mem check on/off off
F1 yes/no check on/off off
Wait Auto decrement on/off on
RAM WW Auto inc/dec on/off on
ROM IWW Auto decrement on/off off
PFC Auto increment on/off on
FLL display noshift on/off off
BATT volt display on/off on

-------------------------------------------------------------------------------
ROM memory check
-------------------------------------------------------------------------------
It is an important point of this tool to measure speed of the memory.
At first,look for the slowest 64K block.
and check the upper limit in each wait.
Check it by performing a reading of the same address twice whether it is not different.
It is a read error if different.

-------------------------------------------------------------------------------
SDRAM memory check
-------------------------------------------------------------------------------
This version is test by current memory wait timing.
An error may occur after SDRAM memory test.
Please reset after SDRAM memory check even if you do not appear an error.

-------------------------------------------------------------------------------
Gap correspondence of the frequency later ver.0.20
-------------------------------------------------------------------------------
Real running frequency agrees with calculated frequency from internal PLL in CG10/20,
but there seem to be approximately 1.6% low frequency in CG50/Graph90+E.
Therefore added real running frequency display from ver.0.20.
Real running frequency is unknown exactly,
The temporary correction freq that multiplied 900/914 by internal PLL frequency.
The correction frequency <-> internal PLL frequency can change by setup.

refer to
http://www.casiopeia.net/forum/viewtopic.php?f=25&t=7327

-------------------------------------------------------------------------------
Acknowledgements
-------------------------------------------------------------------------------
This program was based on Pover(by Ashbad).
developed by PrizmSDK 0.3(Ptune3) .

fxReverse project documentation,
SuperH-based fx calculators,
Cemetech WikiPrizm,
served as a reference very much.

http://casiopeia.net/forum/viewtopic.php?f=2&t=1783&start=50
https://tiplanet.org/forum/viewtopic.php?p=215399#p215399
Very thanks for information from TeamFX and Critor.


I would be happy if this tool is useful for you.

-------------------------------------------------------------------------------
LICENCE
-------------------------------------------------------------------------------
This software is freeware.
The license follows GPLv2.

-------------------------------------------------------------------------------
v0.20 2018.8.19 Change ROM/SDRAM test program.
2018.8.18 Added perform accurate frequency correction.(can selected by setup)
(The temporary correction freq = internal freq * 900 / 914)


v0.10 2017.10.1 Change SDRAM test program by current setting.
Change Icon. ( CG50 type )

v0.05 2017.7.20 Change SDRAM test program,
Change Default setting.
Fixed not save bugs (CS3BCR,CS3WCR)

v0.04 2017.4.19 Change ROM test program,
Fixed ROM test bug again.( to expect....)
Back CS2WCR register structure. ( SH7730 -> SH7724 )

v0.03 2017.4.18 Fixed ROM test bug ( Couldn't do it.. )

v0.02 2017.4.17 Change CS2WCR,CS3WCR register structure. ( SH7724 -> SH7730 )
To be able to modifing SDRAM timing. ( There is not the certainty )
To limit PLL x33.

v0.01 2017.4.15 first release


liens apparentés
http://pm.matrix.jp/ftune2e.html (par Sentaro21)

Processeur Graph 90+E : secrets et overclock avec Ptune3

Ptune3 : overclocke ta Graph 90+E à 275 MHz maintenant !


Commentaires :


LephenixnoirEn ligneAdministrateurPoints: 13596 Défis: 136 Message
Posté le 03-01-2019 à 10:56 | #
Oh, thanks for posting Ptune3! I had to link to TI-Planet just yesterday because we didn't have it in our database, and I was hoping you would share it with us.

Yet another major CG-50 add-in on Planète Casio !
Sentaro21Hors ligneMembrePoints: 244 Défis: 0 Message
Posté le 03-01-2019 à 11:04 | #
Thanks!
It is a beta version, but still works for the moment.
LephenixnoirEn ligneAdministrateurPoints: 13596 Défis: 136 Message
Posté le 03-01-2019 à 11:09 | #
I've been using it for a while and it's never caused any damage to my CG-50. Your add-ins are really reliable.
LightmareHors ligneMembre de CreativeCalcPoints: 354 Défis: 0 Message
Posté le 03-01-2019 à 11:13 | #
i read the topic on Ti-Planet deauling with Ptune, and i saw that the FLL can be set over 1022 on Ptune 2. I was wondering if this setting can break the calculator or not ?
Sentaro21Hors ligneMembrePoints: 244 Défis: 0 Message
Posté le 03-01-2019 à 13:05 | #
@Lephenixnoir
Thanks again.
I have made some CG10 a brick during development of Ptune2.
However, it is still all right in CG50.
Graph90+E/CG50 may be hard to become the brick.

@Lightmare
The maximum of FLL was 2047, but has not been broken even if I put it up to there.
The core of CPU is considerably tough.
I assume it MAX 1023 as a guidance for security.

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